Duke Pratt School of Engineering

Study Finds Next-Generation Transistor Performance Inflated in Most Lab Testing

Duke engineers show how a common device architecture used to test 2D transistors overstates their performance prospects in ...
Compound Semiconductor

Has 2D transistors' performance been inflated?

The research 'Impact of Contact Gating on Scaling of Monolayer 2D Transistors Using a Symmetric Dual-Gate Structure' appeared ...
EDN

Universal logic element on one transistor and its applications

A universal passive logic element of positive and negative logic, made on just one transistor, is proposed. The logic element has at least two inputs, as well as three outputs: an OR, an XOR, and an ...
Nanowerk

Common lab design inflates 2D transistor performance by up to six times

Lab architecture used to test 2D semiconductors artificially boosts performance metrics, making it harder to assess whether ...